1. Field of the Invention
The present invention relates generally to an analog-digital converter and, more particularly, to a sample-and-hold amplifier using a clock boosting technique and an analog-digital converter having the sample-and-hold amplifier.
2. Description of the Related Art
Recently, with the development of high density Very Large-Scale Integration (VLSI) processing technology and Digital Signal Processing (DSP) technology, the demand for high performance analog-digital converters to be used in high quality video systems, next generation personal portable communication equipment, high speed digital communication networks and medical equipment is gradually increasing. Furthermore, as the demand for portable equipment is increasing, low power, low voltage analog-digital converters, each of which, together with another Complimentary Metal-Oxide Semiconductor (CMOS) that uses a 1.8 V level low voltage source, can be implemented in a single chip, is under great demand. In particular, in the case of image display applications, such as a flat display input unit and a Liquid Crystal Display (LCD) monitor drive circuit, a sampling rate is equal to or higher than 100 MHz and several-hundred-MHz-level input signals must be processed at a resolution of 8 bits, so that analog-digital converters, to the input terminals of which sample-and-hold amplifiers capable of operating at high speed and sampling high frequency input signals are applied, are essential.
Recently, the market for digital televisions has rapidly expanded. Additionally, Vestigial Side Band (VSB) will be used as the standard for a digital television reception method in Korea. When VSB digital television is received, analog-digital converters are used to digitally process analog television signals.
A conventional method of sampling an analog signal to produce an input for an analog-digital converter is performed using a tuner, a Surface Acoustic Wave (SAW) filter and a mixer, as shown in FIG. 1. Accordingly, this method is disadvantageous in that the unit cost of a digital television board is high because the method should employ a two-stage mixer.
Additionally, the circuit of the method is disadvantageous in that, when a very high input frequency enters in the case where the circuit is used in a sub-sampling analog-digital converter, the operational characteristics of sampling results are deteriorated due to the increase and variation of input impedance, thus causing reduction in performance. Accordingly, it is difficult to obtain a signal of more than 8 bits. As a result, it is difficult to use the circuit of the method in a sub-sampling analog-digital converter.